Messages in this thread | | | Date | Wed, 13 Jul 2022 10:57:08 +0530 | From | Viresh Kumar <> | Subject | Re: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init() |
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On 12-07-22, 11:40, Perry Yuan wrote: > This cppc_req_cached valued should be prefetched during > amd_pstate_cpu_init call period, then the amd_pstate_update() will get > correct cached value before updating the perf to change the cpu perf > level.
You are doing more than this in the patch, either mention all the stuff with reasoning or split into two patches.
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > --- > drivers/cpufreq/amd-pstate.c | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 43e6df9f67f6..e4904da54541 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) > cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; > > policy->driver_data = cpudata; > + if (!shared_mem) {
This is a new change, which the commit log doesn't talk about.
> + ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value); > + if (ret) > + return ret; > + WRITE_ONCE(cpudata->cppc_hw_conf_cached, value); > > - ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value); > - if (ret) > - return ret; > - WRITE_ONCE(cpudata->cppc_hw_conf_cached, value); > - > + ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value); > + if (ret) > + return ret; > + WRITE_ONCE(cpudata->cppc_req_cached, value); > + } > amd_pstate_boost_init(cpudata); > > return 0; > -- > 2.25.1
-- viresh
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