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SubjectRe: [PATCHv6 1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms
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On 7/12/22 07:41, Dinh Nguyen wrote:
> Hi Wolfram,
>
> On 6/22/22 15:07, Wolfram Sang wrote:
>>
>>>  From the original code, the first mechanism to a recovery is to
>>> acquire a
>>> GPIO for the SCL line and send the 9 SCL pulses, after that, it does
>>> a reset
>>> of the I2C module. For the SOCFPGA part, there is no GPIO line for
>>> the SCL,
>>> thus the I2C module cannot even get a reset. This code allows the
>>> function
>>> to reset the I2C module for SOCFPGA, which is the 2nd part of the
>>> recovery
>>> process.
>>
>> The second part is totally useless if the client device is holding SDA
>> low. Which is exactly the situation that recovery tries to fix. As I
>> said, if you can't control SCL, you don't have recovery.
>>
>
> This is recovery of the master and not the slave.  We have a customer
> that is the using I2C with the signals routed through the FPGA, and thus
> are not GPIO. During a timeout, with this code, the driver is able to
> recover the master.
>

Adding a bit more, because of patch:

ca382f5b38f3 ("i2c: designware: add i2c gpio recovery option")

the driver is now not able to reset the controller at all because it has
placed a strict dependency on getting a GPIO. Before this patch, during
a timeout, there was a simple call to i2c_dw_init_master(), which
ultimately resets the master.

Dinh

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