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Subject[PATCH 6/6] arm64: dts: imx8mp: add VPU blk ctrl node
Date
From: Peng Fan <peng.fan@nxp.com>

Add i.MX8MP VPU blk ctrl node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index fb52404f4cdf..b906aabf0685 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1185,6 +1185,24 @@ gic: interrupt-controller@38800000 {
interrupt-parent = <&gic>;
};

+ vpumix_blk_ctl: blk-ctl@38330000 {
+ compatible = "fsl,imx8mp-vpu-blk-ctrl", "syscon";
+ reg = <0x38330000 0x100>;
+ #power-domain-cells = <1>;
+ power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
+ <&pgc_vpu_g2>, <&pgc_vpu_h1>;
+ power-domain-names = "bus", "g1", "g2", "h1";
+ clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>,
+ <&clk IMX8MP_CLK_VPU_G2_ROOT>,
+ <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+ clock-names = "g1", "g2", "h1";
+ interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
+ <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
+ <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
+ interconnect-names = "g1", "g2", "h1";
+ };
+
+
edacmc: memory-controller@3d400000 {
compatible = "snps,ddrc-3.80a";
reg = <0x3d400000 0x400000>;
--
2.25.1
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