lkml.org 
[lkml]   [2022]   [Jul]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH v2 2/5] dt-bindings: mmc: sdhci-msm: constrain reg-names perp variants
From
On 11/07/2022 16:52, Doug Anderson wrote:
> Hi
>
> On Mon, Jul 11, 2022 at 1:29 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> The entries in arrays must have fixed order, so the bindings and Linux
>> driver expecting various combinations of 'reg' addresses was never
>> actually conforming to guidelines.
>>
>> The 'core' reg entry is valid only for SDCC v4 and lower, so disallow it
>> in SDCC v5. SDCC v4 supports CQE and ICE, so allow them, even though
>> the qcom,sdhci-msm-v4 compatible is used also for earlier SoCs with SDCC
>> v2 or v3, so it is not entirely accurate.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>
>> ---
>>
>> Changes since v1:
>> 1. Rework the patch based on Doug's feedback.
>> ---
>> .../devicetree/bindings/mmc/sdhci-msm.yaml | 61 ++++++++++++-------
>> 1 file changed, 38 insertions(+), 23 deletions(-)
>
> In the ${SUBJECT} I'm not sure what a "perp variant" is. Is that a
> typo or just a phrase I'm not aware of?

Should be:
"per variants"

>
>
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> index fc6e5221985a..2f0fdd65e908 100644
>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>> @@ -49,33 +49,11 @@ properties:
>>
>> reg:
>> minItems: 1
>> - items:
>> - - description: Host controller register map
>> - - description: SD Core register map
>> - - description: CQE register map
>> - - description: Inline Crypto Engine register map
>> + maxItems: 4
>>
>> reg-names:
>> minItems: 1
>> maxItems: 4
>> - oneOf:
>> - - items:
>> - - const: hc
>> - - items:
>> - - const: hc
>> - - const: core
>> - - items:
>> - - const: hc
>> - - const: cqhci
>> - - items:
>> - - const: hc
>> - - const: cqhci
>> - - const: ice
>> - - items:
>> - - const: hc
>> - - const: core
>> - - const: cqhci
>> - - const: ice
>>
>> clocks:
>> minItems: 3
>> @@ -177,6 +155,43 @@ required:
>> allOf:
>> - $ref: mmc-controller.yaml#
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,sdhci-msm-v4
>> + then:
>> + properties:
>> + reg:
>> + minItems: 2
>> + items:
>> + - description: Host controller register map
>> + - description: SD Core register map
>> + - description: CQE register map
>> + - description: Inline Crypto Engine register map
>> + reg-names:
>> + minItems: 2
>> + items:
>> + - const: hc
>> + - const: core
>> + - const: cqhci
>> + - const: ice
>> + else:
>> + properties:
>> + reg:
>> + minItems: 1
>> + items:
>> + - description: Host controller register map
>> + - description: CQE register map
>> + - description: Inline Crypto Engine register map
>> + reg-names:
>> + minItems: 1
>> + items:
>> + - const: hc
>> + - const: cqhci
>> + - const: ice
>
> Do you need to set "maxItems" here? If you don't then will it inherit
> the maxItems of 4 from above?

No, items determine the size instead.


Best regards,
Krzysztof

\
 
 \ /
  Last update: 2022-07-11 16:54    [W:0.116 / U:0.144 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site