Messages in this thread | | | Date | Fri, 1 Jul 2022 13:42:46 +0200 | Subject | Re: [PATCH] ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 | From | Alexandre TORGUE <> |
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Hi Fabrice
On 6/21/22 10:45, Fabrice Gasnier wrote: > The USBH composed of EHCI and OHCI controllers needs the PHY clock to be > initialized first, before enabling (gating) them. The reverse is also > required when going to suspend. > So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL > gets enabled 1st upon controller init. Upon suspend/resume, this also makes > the clock to be disabled/re-enabled in the correct order. > This fixes some IRQ storm conditions seen when going to low-power, due to > PHY PLL being disabled before all clocks are cleanly gated. > > Fixes: 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c") > Fixes: db7be2cb87ae ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151") > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> > --- > arch/arm/boot/dts/stm32mp151.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi > index edc0a1641c7b..9e2226430802 100644 > --- a/arch/arm/boot/dts/stm32mp151.dtsi > +++ b/arch/arm/boot/dts/stm32mp151.dtsi > @@ -1473,7 +1473,7 @@ stmmac_axi_config_0: stmmac-axi-config { > usbh_ohci: usb@5800c000 { > compatible = "generic-ohci"; > reg = <0x5800c000 0x1000>; > - clocks = <&rcc USBH>, <&usbphyc>; > + clocks = <&usbphyc>, <&rcc USBH>; > resets = <&rcc USBH_R>; > interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > status = "disabled"; > @@ -1482,7 +1482,7 @@ usbh_ohci: usb@5800c000 { > usbh_ehci: usb@5800d000 { > compatible = "generic-ehci"; > reg = <0x5800d000 0x1000>; > - clocks = <&rcc USBH>; > + clocks = <&usbphyc>, <&rcc USBH>; > resets = <&rcc USBH_R>; > interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; > companion = <&usbh_ohci>;
Applied in stm32-fixes.
Thanks Alex
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