Messages in this thread | | | Date | Thu, 9 Jun 2022 14:54:11 +0100 | From | Will Deacon <> | Subject | Re: [PATCH v3 2/4] RISC-V: Support CPUID for risc-v in perf |
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On Tue, Jun 07, 2022 at 04:16:45PM +0300, Nikita Shubin wrote: > From: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> > > This patch creates the header.c file for the risc-v architecture and introduces support for > PMU identification through sysfs. > It is now possible to configure pmu-events in risc-v. > > Depends on patch [1], that introduces the id sysfs file. > > Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> > [Nikita: replaced soc:pmu to riscv-pmu/id] > Signed-off-by: Nikita Shubin <n.shubin@yadro.com> > Tested-by: Nikita Shubin <n.shubin@yadro.com> > --- > v2->v3: > - Change 'soc/soc:pmu/id' to 'riscv-pmu/id' > --- > drivers/perf/riscv_pmu.c | 18 ++++++++ > tools/perf/arch/riscv/util/Build | 1 + > tools/perf/arch/riscv/util/header.c | 66 +++++++++++++++++++++++++++++
You will need to separate out the kernel changes from the tooling changes in order to get this merged.
Thanks,
Will
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