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    Subject[PATCH v8 07/14] dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding
    Date
    This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).

    Reviewed-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Liu Ying <victor.liu@nxp.com>
    ---
    v7->v8:
    * No change.

    v6->v7:
    * No change.

    v5->v6:
    * Add Rob's R-b tag.

    v4->v5:
    * No change.

    v3->v4:
    * Add 'fsl,sc-resource' property. (Rob)

    v2->v3:
    * Drop 'fsl,syscon' property. (Rob)
    * Mention the CSR module controls PXL2DPI.

    v1->v2:
    * Use graph schema. (Laurent)

    .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 ++++++++++++++++++
    1 file changed, 108 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml

    diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml
    new file mode 100644
    index 000000000000..e4e77fad05f1
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml
    @@ -0,0 +1,108 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
    +
    +maintainers:
    + - Liu Ying <victor.liu@nxp.com>
    +
    +description: |
    + The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
    + interfaces the pixel link 36-bit data output and the DSI controller’s
    + MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
    + used in LVDS mode, to remap the pixel color codings between those modules.
    + This module is purely combinatorial.
    +
    + The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
    + The CSR module, as a system controller, contains the PXL2DPI's configuration
    + register.
    +
    +properties:
    + compatible:
    + const: fsl,imx8qxp-pxl2dpi
    +
    + fsl,sc-resource:
    + $ref: /schemas/types.yaml#/definitions/uint32
    + description: The SCU resource ID associated with this PXL2DPI instance.
    +
    + power-domains:
    + maxItems: 1
    +
    + fsl,companion-pxl2dpi:
    + $ref: /schemas/types.yaml#/definitions/phandle
    + description: |
    + A phandle which points to companion PXL2DPI which is used by downstream
    + LVDS Display Bridge(LDB) in split mode.
    +
    + ports:
    + $ref: /schemas/graph.yaml#/properties/ports
    +
    + properties:
    + port@0:
    + $ref: /schemas/graph.yaml#/properties/port
    + description: The PXL2DPI input port node from pixel link.
    +
    + port@1:
    + $ref: /schemas/graph.yaml#/properties/port
    + description: The PXL2DPI output port node to downstream bridge.
    +
    + required:
    + - port@0
    + - port@1
    +
    +required:
    + - compatible
    + - fsl,sc-resource
    + - power-domains
    + - ports
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + #include <dt-bindings/firmware/imx/rsrc.h>
    + pxl2dpi {
    + compatible = "fsl,imx8qxp-pxl2dpi";
    + fsl,sc-resource = <IMX_SC_R_MIPI_0>;
    + power-domains = <&pd IMX_SC_R_MIPI_0>;
    +
    + ports {
    + #address-cells = <1>;
    + #size-cells = <0>;
    +
    + port@0 {
    + #address-cells = <1>;
    + #size-cells = <0>;
    + reg = <0>;
    +
    + mipi_lvds_0_pxl2dpi_dc_pixel_link0: endpoint@0 {
    + reg = <0>;
    + remote-endpoint = <&dc_pixel_link0_mipi_lvds_0_pxl2dpi>;
    + };
    +
    + mipi_lvds_0_pxl2dpi_dc_pixel_link1: endpoint@1 {
    + reg = <1>;
    + remote-endpoint = <&dc_pixel_link1_mipi_lvds_0_pxl2dpi>;
    + };
    + };
    +
    + port@1 {
    + #address-cells = <1>;
    + #size-cells = <0>;
    + reg = <1>;
    +
    + mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
    + reg = <0>;
    + remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;
    + };
    +
    + mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {
    + reg = <1>;
    + remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;
    + };
    + };
    + };
    + };
    --
    2.25.1
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