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SubjectRe: [PATCH] KVM: x86: preserve interrupt shadow across SMM entries
On Wed, Jun 08, 2022, Maxim Levitsky wrote:
> On Tue, 2022-06-07 at 19:22 +0000, Sean Christopherson wrote:
> > On Tue, Jun 07, 2022, Paolo Bonzini wrote:
> > > On 6/7/22 17:16, Maxim Levitsky wrote:
> > > > If the #SMI happens while the vCPU is in the interrupt shadow,
> > > > (after STI or MOV SS),
> > > > we must both clear it to avoid VM entry failure on VMX,
> > > > due to consistency check vs EFLAGS.IF which is cleared on SMM entries,
> > > > and restore it on RSM so that #SMI is transparent to the non SMM code.
> > > >
> > > > To support migration, reuse upper 4 bits of
> > > > 'kvm_vcpu_events.interrupt.shadow' to store the smm interrupt shadow.
> > > >
> > > > This was lightly tested with a linux guest and smm load script,
> > > > and a unit test will be soon developed to test this better.
> > > >
> > > > For discussion: there are other ways to fix this issue:
> > > >
> > > > 1. The SMM shadow can be stored in SMRAM at some unused
> > > > offset, this will allow to avoid changes to kvm_vcpu_ioctl_x86_set_vcpu_events
> > >
> > > Yes, that would be better (and would not require a new cap).
> >
> > At one point do we chalk up SMM emulation as a failed experiment and deprecate
> > support? There are most definitely more bugs lurking in KVM's handling of
> > save/restore across SMI+RSM.
>
> I also kind of agree that SMM was kind of a mistake but these days VMs with secure
> boot use it, so we can't stop supporting this.

Ugh, found the KVM forum presentation. That's unfortunate :-(

> So do you also agree that I write the interrupt shadow to smram?

Yep, unless we want to block SMIs in shadows, which I don't think is allowed by
AMD's architecture. Using a micro-architecture specific field in SMRAM is how
actual silicon would preserve the state.

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