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SubjectRe: [PATCH v16 3/3] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr
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On 08/06/2022 10:21, Xu Yilun wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Jun 07, 2022 at 02:10:30PM +0300, Ivan Bornyakov wrote:
>> Add Device Tree Binding doc for Microchip Polarfire FPGA Manager using
>> slave SPI to load .dat formatted bitstream image.
>>
>> Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>

Not sure what the SoB tags are for?
Ivan can't add them in the correct order when he's sending his patches.
Am I missing something?

Confused,
Conor.
>
>> ---
>> .../fpga/microchip,mpf-spi-fpga-mgr.yaml | 44 +++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
>> new file mode 100644
>> index 000000000000..aee45cb15592
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
>> @@ -0,0 +1,44 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip Polarfire FPGA manager.
>> +
>> +maintainers:
>> + - Ivan Bornyakov <i.bornyakov@metrotek.ru>
>> +
>> +description:
>> + Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to
>> + load the bitstream in .dat format.
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - microchip,mpf-spi-fpga-mgr
>> +
>> + reg:
>> + description: SPI chip select
>> + maxItems: 1
>> +
>> + spi-max-frequency: true
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + spi {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + fpga_mgr@0 {
>> + compatible = "microchip,mpf-spi-fpga-mgr";
>> + spi-max-frequency = <20000000>;
>> + reg = <0>;
>> + };
>> + };
>> --
>> 2.35.1
>>

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