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    Subject[PATCH 5.18 755/879] PCI: qcom: Fix pipe clock imbalance
    Date
    From: Johan Hovold <johan+linaro@kernel.org>

    commit fdf6a2f533115ec5d4d9629178f8196331f1ac50 upstream.

    Fix a clock imbalance introduced by ed8cc3b1fc84 ("PCI: qcom: Add support
    for SDM845 PCIe controller"), which enables the pipe clock both in init()
    and in post_init() but only disables in post_deinit().

    Note that the pipe clock was also never disabled in the init() error
    paths and that enabling the clock before powering up the PHY looks
    questionable.

    Link: https://lore.kernel.org/r/20220401133351.10113-1-johan+linaro@kernel.org
    Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
    Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
    Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Cc: stable@vger.kernel.org # 5.6
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/pci/controller/dwc/pcie-qcom.c | 6 ------
    1 file changed, 6 deletions(-)

    --- a/drivers/pci/controller/dwc/pcie-qcom.c
    +++ b/drivers/pci/controller/dwc/pcie-qcom.c
    @@ -1238,12 +1238,6 @@ static int qcom_pcie_init_2_7_0(struct q
    goto err_disable_clocks;
    }

    - ret = clk_prepare_enable(res->pipe_clk);
    - if (ret) {
    - dev_err(dev, "cannot prepare/enable pipe clock\n");
    - goto err_disable_clocks;
    - }
    -
    /* Wait for reset to complete, required on SM8450 */
    usleep_range(1000, 1500);


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