Messages in this thread Patch in this message | | | From | Greg Kroah-Hartman <> | Subject | [PATCH 5.18 625/879] ARM: dts: lan966x: swap dma channels for crypto node | Date | Tue, 7 Jun 2022 19:02:23 +0200 |
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From: Michael Walle <michael@walle.cc>
[ Upstream commit 8b4092fd0c1a0aaa985413c43b027f87dd457207 ]
The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order of the channels. Swap them to pass devicetree validation.
Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.cc Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Sasha Levin <sashal@kernel.org> --- arch/arm/boot/dts/lan966x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7d2869648050..5e9cbc8cdcbc 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -114,9 +114,9 @@ compatible = "atmel,at91sam9g46-aes"; reg = <0xe004c000 0x100>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>, - <&dma0 AT91_XDMAC_DT_PERID(12)>; - dma-names = "rx", "tx"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>, + <&dma0 AT91_XDMAC_DT_PERID(13)>; + dma-names = "tx", "rx"; clocks = <&nic_clk>; clock-names = "aes_clk"; }; -- 2.35.1
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