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    Subject[PATCH 5.17 252/772] x86/PCI: Fix ALi M1487 (IBC) PIRQ router link value interpretation
    Date
    From: Maciej W. Rozycki <macro@orcam.me.uk>

    [ Upstream commit 4969e223b109754c2340a26bba9b1cf44f0cba9b ]

    Fix an issue with commit 1ce849c75534 ("x86/PCI: Add support for the ALi
    M1487 (IBC) PIRQ router") and correct ALi M1487 (IBC) PIRQ router link
    value (`pirq' cookie) interpretation according to findings in the BIOS.

    Credit to Nikolai Zhubr for the detective work as to the bit layout.

    Fixes: 1ce849c75534 ("x86/PCI: Add support for the ALi M1487 (IBC) PIRQ router")
    Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Link: https://lore.kernel.org/r/alpine.DEB.2.21.2203310013270.44113@angie.orcam.me.uk
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/x86/pci/irq.c | 19 ++++++++++++++++---
    1 file changed, 16 insertions(+), 3 deletions(-)

    diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
    index 97b63e35e152..21c4bc41741f 100644
    --- a/arch/x86/pci/irq.c
    +++ b/arch/x86/pci/irq.c
    @@ -253,6 +253,15 @@ static void write_pc_conf_nybble(u8 base, u8 index, u8 val)
    pc_conf_set(reg, x);
    }

    +/*
    + * FinALi pirq rules are as follows:
    + *
    + * - bit 0 selects between INTx Routing Table Mapping Registers,
    + *
    + * - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
    + *
    + * - bits 7:4 map to bits 3:0 of the PCI INTx Sensitivity Register.
    + */
    static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
    int pirq)
    {
    @@ -260,11 +269,13 @@ static int pirq_finali_get(struct pci_dev *router, struct pci_dev *dev,
    0, 9, 3, 10, 4, 5, 7, 6, 0, 11, 0, 12, 0, 14, 0, 15
    };
    unsigned long flags;
    + u8 index;
    u8 x;

    + index = (pirq & 1) << 1 | (pirq & 8) >> 3;
    raw_spin_lock_irqsave(&pc_conf_lock, flags);
    pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
    - x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1)];
    + x = irqmap[read_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index)];
    pc_conf_set(PC_CONF_FINALI_LOCK, 0);
    raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
    return x;
    @@ -278,13 +289,15 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
    };
    u8 val = irqmap[irq];
    unsigned long flags;
    + u8 index;

    if (!val)
    return 0;

    + index = (pirq & 1) << 1 | (pirq & 8) >> 3;
    raw_spin_lock_irqsave(&pc_conf_lock, flags);
    pc_conf_set(PC_CONF_FINALI_LOCK, PC_CONF_FINALI_LOCK_KEY);
    - write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, pirq - 1, val);
    + write_pc_conf_nybble(PC_CONF_FINALI_PCI_INTX_RT1, index, val);
    pc_conf_set(PC_CONF_FINALI_LOCK, 0);
    raw_spin_unlock_irqrestore(&pc_conf_lock, flags);
    return 1;
    @@ -293,7 +306,7 @@ static int pirq_finali_set(struct pci_dev *router, struct pci_dev *dev,
    static int pirq_finali_lvl(struct pci_dev *router, struct pci_dev *dev,
    int pirq, int irq)
    {
    - u8 mask = ~(1u << (pirq - 1));
    + u8 mask = ~((pirq & 0xf0u) >> 4);
    unsigned long flags;
    u8 trig;

    --
    2.35.1


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