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    Subject[PATCH 5.15 079/667] drivers: mmc: sdhci_am654: Add the quirk to set TESTCD bit
    Date
    From: Vignesh Raghavendra <vigneshr@ti.com>

    [ Upstream commit c7666240ec76422cb7546bd07cc8ae80dc0ccdd2 ]

    The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
    line to be connected for proper functioning. Similar to the issue pointed
    out in sdhci-of-arasan.c driver, commit 3794c542641f ("mmc:
    sdhci-of-arasan: Set controller to test mode when no CD bit").

    In cases where this can't be connected, add a quirk to force the
    controller into test mode and set the TESTCD bit. Use the flag
    "ti,fails-without-test-cd", to implement this above quirk when required.

    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
    Link: https://lore.kernel.org/r/20220425063120.10135-3-a-govindraju@ti.com
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/mmc/host/sdhci_am654.c | 23 ++++++++++++++++++++++-
    1 file changed, 22 insertions(+), 1 deletion(-)

    diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
    index b4891bb26648..a3e62e212631 100644
    --- a/drivers/mmc/host/sdhci_am654.c
    +++ b/drivers/mmc/host/sdhci_am654.c
    @@ -147,6 +147,9 @@ struct sdhci_am654_data {
    int drv_strength;
    int strb_sel;
    u32 flags;
    + u32 quirks;
    +
    +#define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0)
    };

    struct sdhci_am654_driver_data {
    @@ -369,6 +372,21 @@ static void sdhci_am654_write_b(struct sdhci_host *host, u8 val, int reg)
    }
    }

    +static void sdhci_am654_reset(struct sdhci_host *host, u8 mask)
    +{
    + u8 ctrl;
    + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
    + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
    +
    + sdhci_reset(host, mask);
    +
    + if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {
    + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
    + ctrl |= SDHCI_CTRL_CDTEST_INS | SDHCI_CTRL_CDTEST_EN;
    + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
    + }
    +}
    +
    static int sdhci_am654_execute_tuning(struct mmc_host *mmc, u32 opcode)
    {
    struct sdhci_host *host = mmc_priv(mmc);
    @@ -500,7 +518,7 @@ static struct sdhci_ops sdhci_j721e_4bit_ops = {
    .set_clock = sdhci_j721e_4bit_set_clock,
    .write_b = sdhci_am654_write_b,
    .irq = sdhci_am654_cqhci_irq,
    - .reset = sdhci_reset,
    + .reset = sdhci_am654_reset,
    };

    static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = {
    @@ -719,6 +737,9 @@ static int sdhci_am654_get_of_property(struct platform_device *pdev,
    device_property_read_u32(dev, "ti,clkbuf-sel",
    &sdhci_am654->clkbuf_sel);

    + if (device_property_read_bool(dev, "ti,fails-without-test-cd"))
    + sdhci_am654->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST;
    +
    sdhci_get_of_property(pdev);

    return 0;
    --
    2.35.1


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