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    Subject[PATCH 5.10 394/452] irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
    Date
    From: Pali Rohár <pali@kernel.org>

    commit a3d66a76348daf559873f19afc912a2a7c2ccdaf upstream.

    Register ARMADA_370_XP_INT_FABRIC_MASK_OFFS is Armada 370 and XP specific
    and on new Armada platforms it has different meaning. It does not configure
    Performance Counter Overflow interrupt masking. So do not touch this
    register on non-A370/XP platforms (A375, A38x and A39x).

    Signed-off-by: Pali Rohár <pali@kernel.org>
    Cc: stable@vger.kernel.org
    Fixes: 28da06dfd9e4 ("irqchip: armada-370-xp: Enable the PMU interrupts")
    Reviewed-by: Andrew Lunn <andrew@lunn.ch>
    Signed-off-by: Marc Zyngier <maz@kernel.org>
    Link: https://lore.kernel.org/r/20220425113706.29310-1-pali@kernel.org
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/irqchip/irq-armada-370-xp.c | 11 ++++++++++-
    1 file changed, 10 insertions(+), 1 deletion(-)

    --- a/drivers/irqchip/irq-armada-370-xp.c
    +++ b/drivers/irqchip/irq-armada-370-xp.c
    @@ -308,7 +308,16 @@ static inline int armada_370_xp_msi_init

    static void armada_xp_mpic_perf_init(void)
    {
    - unsigned long cpuid = cpu_logical_map(smp_processor_id());
    + unsigned long cpuid;
    +
    + /*
    + * This Performance Counter Overflow interrupt is specific for
    + * Armada 370 and XP. It is not available on Armada 375, 38x and 39x.
    + */
    + if (!of_machine_is_compatible("marvell,armada-370-xp"))
    + return;
    +
    + cpuid = cpu_logical_map(smp_processor_id());

    /* Enable Performance Counter Overflow interrupts */
    writel(ARMADA_370_XP_INT_CAUSE_PERF(cpuid),

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