Messages in this thread | | | Date | Thu, 30 Jun 2022 16:41:32 +0100 | From | Sudeep Holla <> | Subject | Re: [PATCH] riscv: dts: microchip: hook up the mpfs' l2cache |
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On Wed, Jun 29, 2022 at 09:07:33PM +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > The initial PolarFire SoC devicetree must have been forked off from > the fu540 one prior to the addition of l2cache controller support being > added there. When the controller node was added to mpfs.dtsi, it was > not hooked up to the CPUs & thus sysfs reports an incorrect cache > configuration. Hook it up. >
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
-- Regards, Sudeep
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