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    SubjectRe: [PATCH v7 037/102] KVM: x86/mmu: Track shadow MMIO value/mask on a per-VM basis
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    On Mon, 2022-06-27 at 14:53 -0700, isaku.yamahata@intel.com wrote:
    > From: Sean Christopherson <sean.j.christopherson@intel.com>
    >
    > TDX will use a different shadow PTE entry value for MMIO from VMX.  Add
    > members to kvm_arch and track value for MMIO per-VM instead of global
    > variables.  By using the per-VM EPT entry value for MMIO, the existing VMX
    > logic is kept working.
    >
    > In the case of VMX VM case, the EPT entry for MMIO is non-present PTE
    > (present bit cleared) without backing guest physical address (on EPT
    > violation, KVM searches backing guest memory and it finds there is no
    > backing guest page.) or the value to trigger EPT misconfiguration.  Once
    > MMIO is triggered on the EPT entry, the EPT entry is updated to trigger EPT
    > misconfiguration for the future MMIO on the same GPA.  It allows KVM to
    > understand the memory access is for MMIO without searching backing guest
    > pages.). And then KVM parses guest instruction to figure out
    > address/value/width for MMIO.
    >
    > In the case of the guest TD, the guest memory is protected so that VMM
    > can't parse guest instruction to understand the value and access width for
    > MMIO.  Instead, VMM sets up (Shared) EPT to trigger #VE by clearing
    > the VE-suppress bit.  When the guest TD issues MMIO, #VE is injected.  Guest VE
    > handler converts MMIO access into MMIO hypercall to pass
    > address/value/width for MMIO to VMM. (or directly paravirtualize MMIO into
    > hypercall.)  Then VMM can handle the MMIO hypercall without parsing guest
    > instructions.

    This is an infrastructural patch which enables per-VM MMIO caching. Why not
    putting this patch first so you don't need to do below changes (which are
    introduced by your previous patches)?

    [...]

    >  
    > - if (!is_shadow_present_pte(spte) || is_mmio_spte(spte))
    > + if (!is_shadow_present_pte(spte) ||
    > +     is_mmio_spte(vcpu->kvm, spte))
    >   break;
    >  
    >

    [...]

    > @@ -1032,7 +1032,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
    >   gfn_t gfn;
    >  
    >   if (!is_shadow_present_pte(sp->spt[i]) &&
    > -     !is_mmio_spte(sp->spt[i]))
    > +     !is_mmio_spte(vcpu->kvm, sp->spt[i]))
    >   continue;

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