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    SubjectRe: [PATCH net-next v2 01/35] dt-bindings: phy: Add QorIQ SerDes binding
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    On Tue, 28 Jun 2022 18:13:30 -0400, Sean Anderson wrote:
    > This adds a binding for the SerDes module found on QorIQ processors. The
    > phy reference has two cells, one for the first lane and one for the
    > last. This should allow for good support of multi-lane protocols when
    > (if) they are added. There is no protocol option, because the driver is
    > designed to be able to completely reconfigure lanes at runtime.
    > Generally, the phy consumer can select the appropriate protocol using
    > set_mode. For the most part there is only one protocol controller
    > (consumer) per lane/protocol combination. The exception to this is the
    > B4860 processor, which has some lanes which can be connected to
    > multiple MACs. For that processor, I anticipate the easiest way to
    > resolve this will be to add an additional cell with a "protocol
    > controller instance" property.
    >
    > Each serdes has a unique set of supported protocols (and lanes). The
    > support matrix is stored in the driver and is selected based on the
    > compatible string. It is anticipated that a new compatible string will
    > need to be added for each serdes on each SoC that drivers support is
    > added for. There is no "generic" compatible string for this reason.
    >
    > There are two PLLs, each of which can be used as the master clock for
    > each lane. Each PLL has its own reference. For the moment they are
    > required, because it simplifies the driver implementation. Absent
    > reference clocks can be modeled by a fixed-clock with a rate of 0.
    >
    > Signed-off-by: Sean Anderson <sean.anderson@seco.com>
    > ---
    >
    > Changes in v2:
    > - Add #clock-cells. This will allow using assigned-clocks* to configure
    > the PLLs.
    > - Allow a value of 1 for phy-cells. This allows for compatibility with
    > the similar (but according to Ioana Ciornei different enough) lynx-28g
    > binding.
    > - Document phy cells in the description
    > - Document the structure of the compatible strings
    > - Fix example binding having too many cells in regs
    > - Move compatible first
    > - Refer to the device in the documentation, rather than the binding
    > - Remove minItems
    > - Rename to fsl,lynx-10g.yaml
    > - Use list for clock-names
    >
    > .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 93 +++++++++++++++++++
    > 1 file changed, 93 insertions(+)
    > create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
    >

    My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
    on your patch (DT_CHECKER_FLAGS is new in v5.13):

    yamllint warnings/errors:

    dtschema/dtc warnings/errors:
    /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml: patternProperties:^thermistor@:properties:adi,excitation-current-nanoamp: '$ref' should not be valid under {'const': '$ref'}
    hint: Standard unit suffix properties don't need a type $ref
    from schema $id: http://devicetree.org/meta-schemas/core.yaml#
    /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml: ignoring, error in schema: patternProperties: ^thermistor@: properties: adi,excitation-current-nanoamp
    Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.example.dtb:0:0: /example-0/spi/ltc2983@0: failed to match any schema with compatible: ['adi,ltc2983']

    doc reference errors (make refcheckdocs):

    See https://patchwork.ozlabs.org/patch/

    This check can fail if there are any dependencies. The base for a patch
    series is generally the most recent rc1.

    If you already ran 'make dt_binding_check' and didn't see the above
    error(s), then make sure 'yamllint' is installed and dt-schema is up to
    date:

    pip3 install dtschema --upgrade

    Please check and re-submit.

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