Messages in this thread | | | From | Amit Kumar Mahapatra <> | Subject | [PATCH v3 0/2] mtd: rawnand: arasan: Fix clock rate in NV-DDR | Date | Tue, 28 Jun 2022 21:18:22 +0530 |
| |
Based on upstream discussion here: https://lore.kernel.org/all/20211127180758.30884-1-okitain@gmail.com/
This patch series: - Updates NAND bus clock, instead of system clock, as per the timing modes. - Fixes clock rate in NV-DDR --- BRANCH: mtd/next
Changes in v2: - Add a patch to update NAND bus clk instead of system clk
Changes in v3: - Set the NAND bus clk in anfc_setup_interface --- Amit Kumar Mahapatra (1): mtd: rawnand: arasan: Update NAND bus clock instead of system clock
Olga Kitaina (1): mtd: rawnand: arasan: Fix clock rate in NV-DDR
drivers/mtd/nand/raw/arasan-nand-controller.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-)
-- 2.17.1
| |