lkml.org 
[lkml]   [2022]   [Jun]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update
On 25-06-22, 15:44, Jie Hai wrote:
> After completion of data transfer of one or multiple descriptors,
> the completion status and the current head pointer to submission
> queue are written into the CQ and interrupt can be generated to
> inform the software. In interrupt process CQ is read and cq_head
> is updated.
>
> hisi_dma_irq updates cq_head only when the completion status is
> success. When an abnormal interrupt reports, cq_head will not update
> which will cause subsequent interrupt processes read the error CQ
> and never report the correct status.
>
> This patch updates cq_head whenever CQ is accessed.
>
> Fixes: e9f08b65250d ("dmaengine: hisilicon: Add Kunpeng DMA engine support")
>

No need for blank line
> Signed-off-by: Jie Hai <haijie1@huawei.com>
> ---
> drivers/dma/hisi_dma.c | 9 ++++-----
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/dma/hisi_dma.c b/drivers/dma/hisi_dma.c
> index 98bc488893cc..0a0f8a4d168a 100644
> --- a/drivers/dma/hisi_dma.c
> +++ b/drivers/dma/hisi_dma.c
> @@ -436,12 +436,11 @@ static irqreturn_t hisi_dma_irq(int irq, void *data)
> desc = chan->desc;
> cqe = chan->cq + chan->cq_head;
> if (desc) {
> + chan->cq_head = (chan->cq_head + 1) %
> + hdma_dev->chan_depth;
> + hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,

q_base?

--
~Vinod

\
 
 \ /
  Last update: 2022-06-27 08:13    [W:0.323 / U:1.340 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site