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    Subject[PATCH 5.15 103/135] iio: adc: stm32: fix maximum clock rate for stm32mp15x
    Date
    From: Olivier Moysan <olivier.moysan@foss.st.com>

    commit 990539486e7e311fb5dab1bf4d85d1a8973ae644 upstream.

    Change maximum STM32 ADC input clock rate to 36MHz, as specified
    in STM32MP15x datasheets.

    Fixes: d58c67d1d851 ("iio: adc: stm32-adc: add support for STM32MP1")
    Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
    Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
    Link: https://lore.kernel.org/r/20220609095234.375925-1-olivier.moysan@foss.st.com
    Cc: <Stable@vger.kernel.org>
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/iio/adc/stm32-adc-core.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/drivers/iio/adc/stm32-adc-core.c
    +++ b/drivers/iio/adc/stm32-adc-core.c
    @@ -809,7 +809,7 @@ static const struct stm32_adc_priv_cfg s
    static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
    .regs = &stm32h7_adc_common_regs,
    .clk_sel = stm32h7_adc_clk_sel,
    - .max_clk_rate_hz = 40000000,
    + .max_clk_rate_hz = 36000000,
    .has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
    .num_irqs = 2,
    };

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