Messages in this thread | | | From | George Cherian <> | Subject | RE: [PATCH] genirq: Increase the number of interrupters | Date | Mon, 27 Jun 2022 04:53:45 +0000 |
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> -----Original Message----- > From: David Laight <David.Laight@ACULAB.COM> > Sent: Thursday, June 23, 2022 4:48 PM > To: George Cherian <gcherian@marvell.com>; linux-kernel@vger.kernel.org > Cc: Sunil Kovvuri Goutham <sgoutham@marvell.com>; tglx@linutronix.de > Subject: RE: [PATCH] genirq: Increase the number of interrupters > From: George Cherian > > Sent: 23 June 2022 04:16 > > > > Currently the maximum number of interrupters is capped at 8260 (64 + > > 8196) in most of the architectures were CONFIG_SPARSE_IRQ is selected. > > This upper limit is not sufficient for couple of existing SoC's from > > Marvell. > > For eg: Octeon TX2 series of processors support a maximum of 32K > > interrupters. > > > > Bump up the upper limit from 8196 to 65536. > > This seems to add 7kB of static data to the kernel just on the off chance that > some sparse interrupt numbers are large. > > David > How about adding another CONFIG_SPARSE_IRQ_EXTENDED to increase the count?
-George > > > > Signed-off-by: George Cherian <george.cherian@marvell.com> > > --- > > kernel/irq/internals.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index > > f09c60393e559..9bb42757d4afc 100644 > > --- a/kernel/irq/internals.h > > +++ b/kernel/irq/internals.h > > @@ -12,7 +12,7 @@ > > #include <linux/sched/clock.h> > > > > #ifdef CONFIG_SPARSE_IRQ > > -# define IRQ_BITMAP_BITS (NR_IRQS + 8196) > > +# define IRQ_BITMAP_BITS (NR_IRQS + 65536) > > #else > > # define IRQ_BITMAP_BITS NR_IRQS > > #endif > > -- > > 2.25.1 > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, > MK1 1PT, UK Registration No: 1397386 (Wales)
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