Messages in this thread Patch in this message | | | From | Conor Dooley <> | Subject | [PATCH v2 07/16] dt-bindings: memory-controllers: add canaan k210 sram controller | Date | Mon, 27 Jun 2022 20:39:55 +0100 |
| |
From: Conor Dooley <conor.dooley@microchip.com>
The k210 U-Boot port has been using the clocks defined in the devicetree to bring up the board's SRAM, but this violates the dt-schema. As such, move the clocks to a dedicated node with the same compatible string & document it.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- I made myself maintainer since I didn't have anywhere else to point a finger, but I am happy to let someone else take that on!
The corresponding U-Boot code seems to be: static int sram_init(void) { int ret, i; const char * const banks[] = { "sram0", "sram1", "aisram" }; ofnode memory; struct clk clk;
/* Enable RAM clocks */ memory = ofnode_by_compatible(ofnode_null(), "canaan,k210-sram"); if (ofnode_equal(memory, ofnode_null())) return -ENOENT;
for (i = 0; i < ARRAY_SIZE(banks); i++) { ret = clk_get_by_name_nodev(memory, banks[i], &clk); if (ret) continue;
ret = clk_enable(&clk); clk_free(&clk); if (ret) return ret; }
return 0; }
Which, without having the hardware etc, I suspect is likely to keep working after the move. --- .../memory-controllers/canaan,k210-sram.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml new file mode 100644 index 000000000000..837eb65854fc --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan K210 SRAM memory controller + +description: | + The Canaan K210 SRAM memory controller is initialised and programmed by + firmware, but an OS might want to read its registers for error reporting + purposes and to learn about the DRAM topology. + +maintainers: + - Conor Dooley <conor@kernel.org> + +properties: + compatible: + enum: + - canaan,k210-sram + + clocks: + minItems: 1 + items: + - description: sram0 clock + - description: sram1 clock + - description: aisram clock + + clock-names: + minItems: 1 + items: + - const: sram0 + - const: sram1 + - const: aisram + +required: + - compatible + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/k210-clk.h> + memory-controller { + compatible = "canaan,k210-sram"; + clocks = <&sysclk K210_CLK_SRAM0>, + <&sysclk K210_CLK_SRAM1>, + <&sysclk K210_CLK_AI>; + clock-names = "sram0", "sram1", "aisram"; + }; + -- 2.36.1
| |