Messages in this thread | | | From | Appana Durga Kedareswara rao <> | Subject | [PATCH 0/3] microblaze: Add support for TMR Subsystem | Date | Mon, 27 Jun 2022 12:10:21 +0530 |
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This patch series adds support for Triple Modular Redundancy Subsystem, Triple Modular Redundancy (TMR) Microblaze solution provides soft error detection, correction and recovery for Microblaze cores in the system. The Xilinx/AMD Triple Modular Redundancy (TMR) solution in Vivado provides all the necessary building blocks to implement a redundant triplicated MicroBlaze subsystem. This processing subsystem is fault-tolerant and continues to operate nominally after encountering an error. Together with the capability to detect and recover from errors, the implementation ensures the reliability of the entire subsystem, for more details about IP please refer PG268[1].
[1]: https://docs.xilinx.com/r/en-US/pg268-tmr/Triple-Modular-Redundancy-TMR-v1.0-LogiCORE-IP-Product-Guide-PG268
Appana Durga Kedareswara rao (3): microblaze: Add xmb_manager_register function microblaze: Add custom break vector handler for mb manager microblaze: Add support for error injection
arch/microblaze/Kconfig | 10 + .../include/asm/xilinx_mb_manager.h | 29 ++ arch/microblaze/kernel/asm-offsets.c | 7 + arch/microblaze/kernel/entry.S | 302 +++++++++++++++++- 4 files changed, 347 insertions(+), 1 deletion(-) create mode 100644 arch/microblaze/include/asm/xilinx_mb_manager.h
-- 2.25.1
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