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SubjectRe: [PATCH v4 0/2] use static key to optimize pgtable_l4_enabled
On Sat, May 21, 2022 at 8:13 PM Jisheng Zhang <jszhang@kernel.org> wrote:
>
> The pgtable_l4|[l5]_enabled check sits at hot code path, performance
> is impacted a lot. Since pgtable_l4|[l5]_enabled isn't changed after
> boot, so static key can be used to solve the performance issue[1].
>
> An unified way static key was introduced in [2], but it only targets
> riscv isa extension. We dunno whether SV48 and SV57 will be considered
> as isa extension, so the unified solution isn't used for
> pgtable_l4[l5]_enabled now.
>
> patch1 fixes a NULL pointer deference if static key is used a bit earlier.
> patch2 uses the static key to optimize pgtable_l4|[l5]_enabled.
>
> [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html
> [2] https://lore.kernel.org/linux-riscv/20220517184453.3558-1-jszhang@kernel.org/T/#t
>
> Since v3:
> - fix W=1 call to undeclared function 'static_branch_likely' error
>
> Since v2:
> - move the W=1 warning fix to a separate patch
> - move the unified way to use static key to a new patch series.
>
> Since v1:
> - Add a W=1 warning fix
> - Fix W=1 error
> - Based on v5.18-rcN, since SV57 support is added, so convert
> pgtable_l5_enabled as well.
>
>
>
> Jisheng Zhang (2):
> riscv: move sbi_init() earlier before jump_label_init()
> riscv: turn pgtable_l4|[l5]_enabled to static key for RV64

I have tested both these patches on QEMU RV64 and RV32.

Tested-by: Anup Patel <anup@brainfault.org>

Thanks,
Anup

>
> arch/riscv/include/asm/pgalloc.h | 16 ++++----
> arch/riscv/include/asm/pgtable-32.h | 3 ++
> arch/riscv/include/asm/pgtable-64.h | 60 ++++++++++++++++++---------
> arch/riscv/include/asm/pgtable.h | 5 +--
> arch/riscv/kernel/cpu.c | 4 +-
> arch/riscv/kernel/setup.c | 2 +-
> arch/riscv/mm/init.c | 64 ++++++++++++++++++-----------
> arch/riscv/mm/kasan_init.c | 16 ++++----
> 8 files changed, 104 insertions(+), 66 deletions(-)
>
> --
> 2.34.1
>

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