Messages in this thread | | | From | Linus Walleij <> | Date | Sun, 26 Jun 2022 01:18:11 +0200 | Subject | Re: [PATCH v6 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt |
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On Sat, Jun 25, 2022 at 10:07 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add IRQ domain to RZ/G2L pinctrl driver to handle GPIO interrupt. > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can be > used as IRQ lines at a given time. Selection of pins as IRQ lines > is handled by IA55 (which is the IRQC block) which sits in between the > GPIO and GIC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Looks OK to me, as long as I get Marc's approval I'l merge this! Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Maybe Marc want to apply all patches to the irqchip tree?
Yours, Linus Walleij
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