Messages in this thread | | | From | Will Deacon <> | Subject | Re: [PATCH] perf/marvell_cn10k: Fix TAD PMU register offset | Date | Fri, 24 Jun 2022 18:14:00 +0100 |
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On Tue, 14 Jun 2022 17:13:56 +0000, Tanmay Jagdale wrote: > The existing offset of TAD_PRF and TAD_PFC registers are incorrect. > Hence, fix with the right register offsets. > > Also, drop read of TAD_PRF register in tad_pmu_event_counter_start() > since we don't have to preserve any bit fields and always write > an updated value. > > [...]
Applied to will (for-next/perf), thanks!
[1/1] perf/marvell_cn10k: Fix TAD PMU register offset https://git.kernel.org/will/c/f5ebeb138fa6
Cheers, -- Will
https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev
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