Messages in this thread | | | Date | Thu, 23 Jun 2022 14:05:18 +0200 | Subject | Re: [PATCH 1/2] dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions | From | Krzysztof Kozlowski <> |
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On 22/06/2022 20:17, Lad Prabhakar wrote: > Renesas RZ/Five SoC has almost the same clock structure compared to the > Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just > amend the RZ/Five CPG clock and reset definitions. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > include/dt-bindings/clock/r9a07g043-cpg.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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