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    Subject[PATCH 4.19 224/234] powerpc/mm: Switch obsolete dssall to .long
    Date
    From: Alexey Kardashevskiy <aik@ozlabs.ru>

    commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.

    The dssall ("Data Stream Stop All") instruction is obsolete altogether
    with other Data Cache Instructions since ISA 2.03 (year 2006).

    LLVM IAS does not support it but PPC970 seems to be using it.
    This switches dssall to .long as there is no much point in fixing LLVM.

    Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
    Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru
    [sudip: adjust context]
    Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/powerpc/include/asm/ppc-opcode.h | 2 ++
    arch/powerpc/kernel/idle_6xx.S | 2 +-
    arch/powerpc/kernel/l2cr_6xx.S | 6 +++---
    arch/powerpc/kernel/swsusp_32.S | 2 +-
    arch/powerpc/kernel/swsusp_asm64.S | 2 +-
    arch/powerpc/mm/mmu_context.c | 2 +-
    arch/powerpc/platforms/powermac/cache.S | 4 ++--
    7 files changed, 11 insertions(+), 9 deletions(-)

    --- a/arch/powerpc/include/asm/ppc-opcode.h
    +++ b/arch/powerpc/include/asm/ppc-opcode.h
    @@ -207,6 +207,7 @@
    #define PPC_INST_ICBT 0x7c00002c
    #define PPC_INST_ICSWX 0x7c00032d
    #define PPC_INST_ICSWEPX 0x7c00076d
    +#define PPC_INST_DSSALL 0x7e00066c
    #define PPC_INST_ISEL 0x7c00001e
    #define PPC_INST_ISEL_MASK 0xfc00003e
    #define PPC_INST_LDARX 0x7c0000a8
    @@ -424,6 +425,7 @@
    __PPC_RA(a) | __PPC_RB(b))
    #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \
    __PPC_RA(a) | __PPC_RB(b))
    +#define PPC_DSSALL stringify_in_c(.long PPC_INST_DSSALL)
    #define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \
    ___PPC_RT(t) | ___PPC_RA(a) | \
    ___PPC_RB(b) | __PPC_EH(eh))
    --- a/arch/powerpc/kernel/idle_6xx.S
    +++ b/arch/powerpc/kernel/idle_6xx.S
    @@ -133,7 +133,7 @@ BEGIN_FTR_SECTION
    END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
    mtspr SPRN_HID0,r4
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    sync
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
    CURRENT_THREAD_INFO(r9, r1)
    --- a/arch/powerpc/kernel/l2cr_6xx.S
    +++ b/arch/powerpc/kernel/l2cr_6xx.S
    @@ -108,7 +108,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)

    /* Stop DST streams */
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    sync
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

    @@ -305,7 +305,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
    isync

    /* Stop DST streams */
    - DSSALL
    + PPC_DSSALL
    sync

    /* Get the current enable bit of the L3CR into r4 */
    @@ -414,7 +414,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
    _GLOBAL(__flush_disable_L1)
    /* Stop pending alitvec streams and memory accesses */
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
    sync

    --- a/arch/powerpc/kernel/swsusp_32.S
    +++ b/arch/powerpc/kernel/swsusp_32.S
    @@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume)
    #ifdef CONFIG_ALTIVEC
    /* Stop pending alitvec streams and memory accesses */
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
    #endif
    sync
    --- a/arch/powerpc/kernel/swsusp_asm64.S
    +++ b/arch/powerpc/kernel/swsusp_asm64.S
    @@ -143,7 +143,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR
    _GLOBAL(swsusp_arch_resume)
    /* Stop pending alitvec streams and memory accesses */
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
    sync

    --- a/arch/powerpc/mm/mmu_context.c
    +++ b/arch/powerpc/mm/mmu_context.c
    @@ -83,7 +83,7 @@ void switch_mm_irqs_off(struct mm_struct
    * context
    */
    if (cpu_has_feature(CPU_FTR_ALTIVEC))
    - asm volatile ("dssall");
    + asm volatile (PPC_DSSALL);

    if (new_on_cpu)
    radix_kvm_prefetch_workaround(next);
    --- a/arch/powerpc/platforms/powermac/cache.S
    +++ b/arch/powerpc/platforms/powermac/cache.S
    @@ -53,7 +53,7 @@ flush_disable_75x:

    /* Stop DST streams */
    BEGIN_FTR_SECTION
    - DSSALL
    + PPC_DSSALL
    sync
    END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

    @@ -201,7 +201,7 @@ flush_disable_745x:
    isync

    /* Stop prefetch streams */
    - DSSALL
    + PPC_DSSALL
    sync

    /* Disable L2 prefetching */

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