Messages in this thread Patch in this message | | | From | "Peng Fan (OSS)" <> | Subject | [PATCH 11/14] arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings | Date | Wed, 22 Jun 2022 14:14:07 +0800 |
| |
From: Peng Fan <peng.fan@nxp.com>
BIT3 and BIT0 are reserved bits, should not touch.
Fixes: 846f752866bd ("arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART") Signed-off-by: Peng Fan <peng.fan@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 984a6b9ded8d..e34076954897 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -156,8 +156,8 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 pinctrl_uart1: uart1grp { fsl,pins = < - MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x49 - MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x49 + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x40 + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x40 >; }; -- 2.25.1
| |