lkml.org 
[lkml]   [2022]   [Jun]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v2] PCI: qcom: fix IPQ8074 Gen2 support
On Tue, Jun 21, 2022 at 03:32:11PM -0500, Bjorn Helgaas wrote:
> On Tue, Jun 21, 2022 at 01:23:30PM +0200, Robert Marko wrote:
> > IPQ8074 has one Gen2 and one Gen3 port, currently the Gen2 port will
> > cause the system to hang as its using DBI registers in the .init
> > and those are only accesible after phy_power_on().
>
> Is the fact that IPQ8074 has both a Gen2 and a Gen3 port relevant to
> this patch? I don't see the connection.
>
> I see that qcom_pcie_host_init() does:
>
> qcom_pcie_host_init
> pcie->cfg->ops->init(pcie)
> phy_power_on(pcie->phy)
> pcie->cfg->ops->post_init(pcie)
>
> and that you're moving DBI register accesses from
> qcom_pcie_init_2_3_3() to qcom_pcie_post_init_2_3_3().
>
> But I also see DBI register accesses in other .init() functions:
>
> qcom_pcie_init_2_1_0
> qcom_pcie_init_1_0_0 (oddly out of order)
> qcom_pcie_init_2_3_2
> qcom_pcie_init_2_4_0
>
> Why do these accesses not need to be moved? I assume it's because
> pcie->phy is an optional PHY and phy_power_on() does nothing on those
> controllers?

At least the QMP PHY driver does not implement the PHY power_on op and
instead fires everything up already at phy_init(). That may explain the
difference in behaviour here.

Johan

\
 
 \ /
  Last update: 2022-06-22 08:51    [W:0.733 / U:0.124 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site