lkml.org 
[lkml]   [2022]   [Jun]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v12 2/3] ARM: dts: nuvoton: Add memory controller node
On Fri, Jun 10, 2022 at 04:43:39PM +0800, medadyoung@gmail.com wrote:
> From: Medad CChien <ctcchien@nuvoton.com>
>
> ECC must be configured in the BootBlock header.
> Then, you can read error counts via the EDAC kernel framework.
>
> Signed-off-by: Medad CChien <ctcchien@nuvoton.com>
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> index 3696980a3da1..ba542b26941e 100644
> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> @@ -106,6 +106,13 @@
> interrupt-parent = <&gic>;
> ranges;
>
> + mc: memory-controller@f0824000 {
> + compatible = "nuvoton,npcm750-memory-controller";
> + reg = <0x0 0xf0824000 0x0 0x1000>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> rstc: rstc@f0801000 {
> compatible = "nuvoton,npcm750-reset";
> reg = <0xf0801000 0x70>;
> --

This one needs an Ack from DT folks.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

\
 
 \ /
  Last update: 2022-06-20 19:30    [W:0.082 / U:1.252 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site