Messages in this thread Patch in this message | | | Date | Mon, 20 Jun 2022 16:29:38 +0200 | Subject | Re: [PATCH 6/7] KVM: x86: Ignore benign host accesses to "unsupported" PEBS and BTS MSRs | From | Paolo Bonzini <> |
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On 6/13/22 16:09, Sean Christopherson wrote: > On Sat, Jun 11, 2022, Sean Christopherson wrote: >> @@ -4122,6 +4132,16 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) >> msr_info->data = vcpu->arch.guest_fpu.xfd_err; >> break; >> #endif >> + case MSR_IA32_PEBS_ENABLE: >> + case MSR_IA32_DS_AREA: >> + case MSR_PEBS_DATA_CFG: >> + if (kvm_pmu_is_valid_msr(vcpu, msr_info->index)) >> + return kvm_pmu_get_msr(vcpu, msr_info); >> + /* >> + * Userspace is allowed to read MSRs that KVM reports as >> + * to-be-saved, even if an MSR isn't fully supported. >> + */ >> + return !msr_info->host_initiated; > > Gah, this needs to set msr_info->data.
Might also reuse the F15H case:
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 70364d40e3f7..be39968149e6 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3877,9 +3877,16 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */ msr_info->data = 0; break; + case MSR_IA32_PEBS_ENABLE: + case MSR_IA32_DS_AREA: + case MSR_PEBS_DATA_CFG: case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5: if (kvm_pmu_is_valid_msr(vcpu, msr_info->index)) return kvm_pmu_get_msr(vcpu, msr_info); + /* + * Userspace is allowed to read MSRs that KVM reports as + * to-be-saved, even if an MSR isn't fully supported. + */ if (!msr_info->host_initiated) return 1; msr_info->data = 0;
Paolo
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