Messages in this thread | | | Date | Fri, 3 Jun 2022 10:50:06 +0800 | From | kernel test robot <> | Subject | [agd5f:drm-next 34/63] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c:414:6: warning: no previous prototype for 'dcn32_clock_read_ss_info' |
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tree: https://gitlab.freedesktop.org/agd5f/linux.git drm-next head: 0401cdad37f8a62e64363b2a6fc16c7fafba66e2 commit: b5dbe04a9c8ce5c728b827c452b99517c0e387af [34/63] drm/amd/display: add CLKMGR changes for DCN32/321 config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220603/202206031013.jYog18lK-lkp@intel.com/config) compiler: gcc-11 (Debian 11.3.0-1) 11.3.0 reproduce (this is a W=1 build): git remote add agd5f https://gitlab.freedesktop.org/agd5f/linux.git git fetch --no-tags agd5f drm-next git checkout b5dbe04a9c8ce5c728b827c452b99517c0e387af # save the config file mkdir build_dir && cp config build_dir/.config make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/
If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c:414:6: warning: no previous prototype for 'dcn32_clock_read_ss_info' [-Wmissing-prototypes] 414 | void dcn32_clock_read_ss_info(struct clk_mgr_internal *clk_mgr) | ^~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/clk_mgr_internal.h:36, from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c:27: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:133:22: warning: 'SYNAPTICS_DEVICE_ID' defined but not used [-Wunused-const-variable=] 133 | static const uint8_t SYNAPTICS_DEVICE_ID[] = "SYNA"; | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:130:17: warning: 'DP_SINK_BRANCH_DEV_NAME_7580' defined but not used [-Wunused-const-variable=] 130 | static const u8 DP_SINK_BRANCH_DEV_NAME_7580[] = "7580\x80u"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:128:22: warning: 'DP_SINK_DEVICE_STR_ID_2' defined but not used [-Wunused-const-variable=] 128 | static const uint8_t DP_SINK_DEVICE_STR_ID_2[] = {7, 1, 8, 7, 5, 0}; | ^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:127:22: warning: 'DP_SINK_DEVICE_STR_ID_1' defined but not used [-Wunused-const-variable=] 127 | static const uint8_t DP_SINK_DEVICE_STR_ID_1[] = {7, 1, 8, 7, 3, 0}; | ^~~~~~~~~~~~~~~~~~~~~~~
vim +/dcn32_clock_read_ss_info +414 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
413 > 414 void dcn32_clock_read_ss_info(struct clk_mgr_internal *clk_mgr) 415 { 416 struct dc_bios *bp = clk_mgr->base.ctx->dc_bios; 417 int ss_info_num = bp->funcs->get_ss_entry_number( 418 bp, AS_SIGNAL_TYPE_GPU_PLL); 419 420 if (ss_info_num) { 421 struct spread_spectrum_info info = { { 0 } }; 422 enum bp_result result = bp->funcs->get_spread_spectrum_info( 423 bp, AS_SIGNAL_TYPE_GPU_PLL, 0, &info); 424 425 /* SSInfo.spreadSpectrumPercentage !=0 would be sign 426 * that SS is enabled 427 */ 428 if (result == BP_RESULT_OK && 429 info.spread_spectrum_percentage != 0) { 430 clk_mgr->ss_on_dprefclk = true; 431 clk_mgr->dprefclk_ss_divider = info.spread_percentage_divider; 432 433 if (info.type.CENTER_MODE == 0) { 434 /* Currently for DP Reference clock we 435 * need only SS percentage for 436 * downspread 437 */ 438 clk_mgr->dprefclk_ss_percentage = 439 info.spread_spectrum_percentage; 440 } 441 } 442 } 443 } 444 static void dcn32_notify_wm_ranges(struct clk_mgr *clk_mgr_base) 445 { 446 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); 447 WatermarksExternal_t *table = (WatermarksExternal_t *) clk_mgr->wm_range_table; 448 449 if (!clk_mgr->smu_present) 450 return; 451 452 if (!table) 453 return; 454 455 memset(table, 0, sizeof(*table)); 456 457 dcn30_smu_set_dram_addr_high(clk_mgr, clk_mgr->wm_range_table_addr >> 32); 458 dcn30_smu_set_dram_addr_low(clk_mgr, clk_mgr->wm_range_table_addr & 0xFFFFFFFF); 459 dcn32_smu_transfer_wm_table_dram_2_smu(clk_mgr); 460 } 461
-- 0-DAY CI Kernel Test Service https://01.org/lkp
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