Messages in this thread | | | Date | Thu, 16 Jun 2022 12:25:37 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH 03/19] x86/cpufeatures: Enable CET CR4 bit for shadow stack |
| |
On Thu, Jun 16, 2022 at 04:46:27AM -0400, Yang Weijiang wrote:
> static __always_inline void setup_cet(struct cpuinfo_x86 *c) > { > + bool kernel_ibt = HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT); > u64 msr = CET_ENDBR_EN; > > + if (kernel_ibt) > + wrmsrl(MSR_IA32_S_CET, msr); > > + if (kernel_ibt || cpu_feature_enabled(X86_FEATURE_SHSTK)) > + cr4_set_bits(X86_CR4_CET);
Does flipping the CR4 and S_CET MSR write not result in simpler code?
> > + if (kernel_ibt && !ibt_selftest()) { > pr_err("IBT selftest: Failed!\n"); > setup_clear_cpu_cap(X86_FEATURE_IBT);
Looking at this error path; I think I forgot to clear S_CET here.
> return; > } > }
| |