Messages in this thread | | | From | Lai Jiangshan <> | Date | Fri, 17 Jun 2022 08:21:54 +0800 | Subject | Re: [PATCH V3 0/7] x86/entry: Convert error_entry() to C code |
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On Mon, Jun 6, 2022 at 10:44 PM Lai Jiangshan <jiangshanlai@gmail.com> wrote: > > From: Lai Jiangshan <jiangshan.ljs@antgroup.com> > > Add some C equivalent functions of the ASM macros and implement the whole > error_entry() as C code. > > The patches are picked and re-made from the huge patchset > https://lore.kernel.org/lkml/20211126101209.8613-1-jiangshanlai@gmail.com/ > which converts a large chunk of ASM code to C code. > > The C version generally has better readability and easier to be > updated/improved. > > This smaller patchset converts error_entry() only. > The equivalent ASM macros are not removed because they are still used by > the IST exceptions. > > No functional change intended and comments are also copied. > > The complier generates very similar code for the C code and the original > ASM code except minor differences. > > The complier uses tail-call-optimization for calling sync_regs(). It > uses "JMP sync_regs" while the ASM code uses "CALL+RET". > > The compiler generates "AND $0xe7,%ah" (3 bytes) for the code > "cr3 = user_cr3 & ~PTI_USER_PGTABLE_AND_PCID_MASK" while the ASM code in > SWITCH_TO_KERNEL_CR3() results "AND $0xffffffffffffe7ff,%rax" (6 bytes). > > The compiler generates lengthier code for "cr3 |= X86_CR3_PCID_NOFLUSH" > because it uses "MOVABS+OR" (13 bytes) rather than a single > "BTS" (5 bytes). > > ALTERNATIVE and static_cpu_has() are also different which depends on > what alternative instructions for ALTERNATIVE are. > > [V2]: https://lore.kernel.org/lkml/20220516131739.521817-1-jiangshanlai@gmail.com/ > [V1]: https://lore.kernel.org/lkml/20220511072747.3960-1-jiangshanlai@gmail.com/ > > Changed from V2: > Fix conflict in arch/x86/include/asm/proto.h in patch7 > > Changed from V1: > remove unneeded cleanup in patch2 > > Changed from the old huge patchset: > squash some patches >
Hello, ALL,
Ping
Thanks, Lai
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