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    Subject[PATCH v2 3/8] KVM: x86/mmu: Bury 32-bit PSE paging helpers in paging_tmpl.h
    From
    Move a handful of one-off macros and helpers for 32-bit PSE paging into
    paging_tmpl.h and hide them behind "PTTYPE == 32". Under no circumstance
    should anything but 32-bit shadow paging care about PSE paging.

    No functional change intended.

    Signed-off-by: Sean Christopherson <seanjc@google.com>
    ---
    arch/x86/kvm/mmu.h | 5 -----
    arch/x86/kvm/mmu/mmu.c | 7 -------
    arch/x86/kvm/mmu/paging_tmpl.h | 18 +++++++++++++++++-
    3 files changed, 17 insertions(+), 13 deletions(-)

    diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
    index f8192864b496..d1021e34ac15 100644
    --- a/arch/x86/kvm/mmu.h
    +++ b/arch/x86/kvm/mmu.h
    @@ -34,11 +34,6 @@
    #define PT_DIR_PAT_SHIFT 12
    #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)

    -#define PT32_DIR_PSE36_SIZE 4
    -#define PT32_DIR_PSE36_SHIFT 13
    -#define PT32_DIR_PSE36_MASK \
    - (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
    -
    #define PT64_ROOT_5LEVEL 5
    #define PT64_ROOT_4LEVEL 4
    #define PT32_ROOT_LEVEL 2
    diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
    index f168693695bd..73497da1a99b 100644
    --- a/arch/x86/kvm/mmu/mmu.c
    +++ b/arch/x86/kvm/mmu/mmu.c
    @@ -324,13 +324,6 @@ static int is_cpuid_PSE36(void)
    return 1;
    }

    -static gfn_t pse36_gfn_delta(u32 gpte)
    -{
    - int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
    -
    - return (gpte & PT32_DIR_PSE36_MASK) << shift;
    -}
    -
    #ifdef CONFIG_X86_64
    static void __set_spte(u64 *sptep, u64 spte)
    {
    diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h
    index f595c4b8657f..55fd35b1b227 100644
    --- a/arch/x86/kvm/mmu/paging_tmpl.h
    +++ b/arch/x86/kvm/mmu/paging_tmpl.h
    @@ -50,6 +50,11 @@
    #define PT_GUEST_DIRTY_SHIFT PT_DIRTY_SHIFT
    #define PT_GUEST_ACCESSED_SHIFT PT_ACCESSED_SHIFT
    #define PT_HAVE_ACCESSED_DIRTY(mmu) true
    +
    + #define PT32_DIR_PSE36_SIZE 4
    + #define PT32_DIR_PSE36_SHIFT 13
    + #define PT32_DIR_PSE36_MASK \
    + (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
    #elif PTTYPE == PTTYPE_EPT
    #define pt_element_t u64
    #define guest_walker guest_walkerEPT
    @@ -92,6 +97,15 @@ struct guest_walker {
    struct x86_exception fault;
    };

    +#if PTTYPE == 32
    +static inline gfn_t pse36_gfn_delta(u32 gpte)
    +{
    + int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
    +
    + return (gpte & PT32_DIR_PSE36_MASK) << shift;
    +}
    +#endif
    +
    static gfn_t gpte_to_gfn_lvl(pt_element_t gpte, int lvl)
    {
    return (gpte & PT_LVL_ADDR_MASK(lvl)) >> PAGE_SHIFT;
    @@ -416,8 +430,10 @@ static int FNAME(walk_addr_generic)(struct guest_walker *walker,
    gfn = gpte_to_gfn_lvl(pte, walker->level);
    gfn += (addr & PT_LVL_OFFSET_MASK(walker->level)) >> PAGE_SHIFT;

    - if (PTTYPE == 32 && walker->level > PG_LEVEL_4K && is_cpuid_PSE36())
    +#if PTTYPE == 32
    + if (walker->level > PG_LEVEL_4K && is_cpuid_PSE36())
    gfn += pse36_gfn_delta(pte);
    +#endif

    real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(gfn), access, &walker->fault);
    if (real_gpa == UNMAPPED_GVA)
    --
    2.36.1.476.g0c4daa206d-goog
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