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Subject[PATCH v13 08/12] arm64: dts: qcom: sc7280: Add lpass cpu node
Date
Add lpass cpu node for audio on sc7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 62 ++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index e5f6b50..06fe14e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -22,6 +22,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,lpass.h>
#include <dt-bindings/thermal/thermal.h>

/ {
@@ -2336,6 +2337,67 @@
#power-domain-cells = <1>;
};

+ lpass_cpu: audio@3987000 {
+ compatible = "qcom,sc7280-lpass-cpu";
+
+ reg = <0 0x03987000 0 0x68000>,
+ <0 0x03b00000 0 0x29000>,
+ <0 0x03260000 0 0xc000>,
+ <0 0x03280000 0 0x29000>,
+ <0 0x03340000 0 0x29000>,
+ <0 0x0336c000 0 0x3000>;
+ reg-names = "lpass-hdmiif",
+ "lpass-lpaif",
+ "lpass-rxtx-cdc-dma-lpm",
+ "lpass-rxtx-lpaif",
+ "lpass-va-lpaif",
+ "lpass-va-cdc-dma-lpm";
+
+ iommus = <&apps_smmu 0x1820 0>,
+ <&apps_smmu 0x1821 0>,
+ <&apps_smmu 0x1832 0>;
+
+ power-domains = <&rpmhpd SC7280_LCX>;
+ power-domain-names = "lcx";
+ required-opps = <&rpmhpd_opp_nom>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>,
+ <&lpass_core LPASS_CORE_CC_EXT_MCLK0_CLK>,
+ <&lpass_core LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>,
+ <&lpass_core LPASS_CORE_CC_EXT_IF0_IBIT_CLK>,
+ <&lpass_core LPASS_CORE_CC_EXT_IF1_IBIT_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>,
+ <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>,
+ <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>;
+ clock-names = "aon_cc_audio_hm_h",
+ "core_cc_ext_mclk0",
+ "core_cc_sysnoc_mport_core",
+ "core_cc_ext_if0_ibit",
+ "core_cc_ext_if1_ibit",
+ "audio_cc_codec_mem",
+ "audio_cc_codec_mem0",
+ "audio_cc_codec_mem1",
+ "audio_cc_codec_mem2",
+ "aon_cc_va_mem0";
+
+ #sound-dai-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "lpass-irq-lpaif",
+ "lpass-irq-hdmi",
+ "lpass-irq-vaif",
+ "lpass-irq-rxtxif";
+
+ status = "disabled";
+ };
+
lpass_hm: clock-controller@3c00000 {
compatible = "qcom,sc7280-lpasshm";
reg = <0 0x3c00000 0 0x28>;
--
2.7.4
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