Messages in this thread | | | Date | Mon, 13 Jun 2022 11:09:01 +0100 | Subject | Re: [PATCH] perf vendor events arm64: Arm Cortex-A78C and X1C | From | John Garry <> |
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On 10/06/2022 18:44, Nick Forrington wrote: > Add PMU events for the Arm Cortex-A78C and Arm Cortex-X1C CPUs. > > Events for Arm Cortex-A78C match those for Arm Cortex-A78. > Events for Arm Cortex-X1C match those for Arm Cortex- X1. > > As such, this is just a mapfile change. > > Main ID Register (MIDR) and event data is sourced from the corresponding > Arm Technical Reference Manuals: > > Arm Cortex-A78C > https://developer.arm.com/documentation/102226/ > > Arm Cortex-X1C > https://developer.arm.com/documentation/101968/ > > Signed-off-by: Nick Forrington<nick.forrington@arm.com>
Reviewed-by: John Garry <john.garry@huawei.com>
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