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Subject[PATCH 0/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume
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This patch of the series does the following:
- Add a new DT "snps,enable_guctl1_resume_quirk" quirk
- Enable GUCTL1 bit 10 for fixing crc error after resume bug
When this bit is set to '1', the ULPI opmode will be changed
to 'normal' along with HS terminations after EOR.
This option is to support certain legacy ULPI PHYs.

Piyush Mehta (2):
dt-bindings: usb: snps,dwc3: Add 'snps,enable_guctl1_resume_quirk'
quirk
usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after
resume bug

.../devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++
drivers/usb/dwc3/core.c | 16 ++++++++++++++++
drivers/usb/dwc3/core.h | 6 ++++++
3 files changed, 28 insertions(+)

--
2.17.1

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