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    Subject[PATCH 5.18 050/339] watchdog: rzg2l_wdt: Fix reset control imbalance
    Date
    From: Biju Das <biju.das.jz@bp.renesas.com>

    [ Upstream commit 33d04d0fdba9fae18c7d58364643d2c606a43dba ]

    Both rzg2l_wdt_probe() and rzg2l_wdt_start() calls reset_control_
    deassert() which results in a reset control imbalance.

    This patch fixes reset control imbalance by removing reset_control_
    deassert() from rzg2l_wdt_start() and replaces reset_control_assert with
    reset_control_reset in rzg2l_wdt_stop() as watchdog module can be stopped
    only by a module reset. This change will allow us to restart WDT after
    stop() by configuring WDT timeout and enable registers.

    Fixes: 2cbc5cd0b55fa2 ("watchdog: Add Watchdog Timer driver for RZ/G2L")
    Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
    Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
    Reviewed-by: Guenter Roeck <linux@roeck-us.net>
    Link: https://lore.kernel.org/r/20220225175320.11041-5-biju.das.jz@bp.renesas.com
    Signed-off-by: Guenter Roeck <linux@roeck-us.net>
    Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/watchdog/rzg2l_wdt.c | 3 +--
    1 file changed, 1 insertion(+), 2 deletions(-)

    diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
    index 48dfe6e5e64f..88274704b260 100644
    --- a/drivers/watchdog/rzg2l_wdt.c
    +++ b/drivers/watchdog/rzg2l_wdt.c
    @@ -88,7 +88,6 @@ static int rzg2l_wdt_start(struct watchdog_device *wdev)
    {
    struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);

    - reset_control_deassert(priv->rstc);
    pm_runtime_get_sync(wdev->parent);

    /* Initialize time out */
    @@ -108,7 +107,7 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
    struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);

    pm_runtime_put(wdev->parent);
    - reset_control_assert(priv->rstc);
    + reset_control_reset(priv->rstc);

    return 0;
    }
    --
    2.35.1


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