Messages in this thread | | | Date | Mon, 13 Jun 2022 12:55:46 +0200 | Subject | Re: [PATCH v11 10/12] drm/mediatek: dpi: Add dpintf support | From | AngeloGioacchino Del Regno <> |
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Il 13/06/22 08:48, Bo-Chen Chen ha scritto: > From: Guillaume Ranquet <granquet@baylibre.com> > > dpintf is the displayport interface hardware unit. This unit is similar > to dpi and can reuse most of the code. > > This patch adds support for mt8195-dpintf to this dpi driver. Main > differences are: > - Some features/functional components are not available for dpintf > which are now excluded from code execution once is_dpintf is set > - dpintf can and needs to choose between different clockdividers based > on the clockspeed. This is done by choosing a different clock parent. > - There are two additional clocks that need to be managed. These are > only set for dpintf and will be set to NULL if not supplied. The > clk_* calls handle these as normal clocks then. > - Some register contents differ slightly between the two components. To > work around this I added register bits/masks with a DPINTF_ prefix > and use them where different. > > Based on a separate driver for dpintf created by > Jitao shi <jitao.shi@mediatek.com>. > > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> > [Bo-Chen: Modify reviewers' comments.] > Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 115 ++++++++++++++++++-- > drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 13 +++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4 + > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3 + > 5 files changed, 126 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 6b8cf648a5b5..08c8f21b4421 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -71,6 +71,7 @@ struct mtk_dpi { > void __iomem *regs; > struct device *dev; > struct clk *engine_clk; > + struct clk *pll_gate_clk;
You don't need this clock in this driver, at all.
`pll_gate` would be CLK_VDO0_DP_INTF0_DP_INTF (parent = CLK_TOP_EDP);
Currently, you're assigning CLK_TOP_EDP to "pixel", but you can, at this point, simply assign CLK_VDO0_DP_INTF0_DP_INTF to "pixel" instead... as when you call clk_prepare_enable() on it, that'll also take care of enabling its CLK_TOP_EDP parent for you.
You're not doing anything special if not taking care of enabling/disabling it.
Regards, Angelo
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