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Subject[PATCH v2 0/4] Prepare general purpose clocks on msm8916
Date
Some devices make use of general purpose clocks as PWM outputs by
controlling their duty cycle.

Notably, many devices (e.g. Samsung A3/A5, LG G Watch R and probably
many others) use clock based PWM to control the haptic feedback,
some other can control backlight or flash/torch LED brightness.

As a follow-up to a proposed clock based PWM output driver [1],
this series contains various fixes to make it useful on msm8916
based devices.

[1] - https://lore.kernel.org/lkml/20220612132203.290726-1-nikita@trvn.ru/T/#t

Changes since v1:
- Use clamp() instead of two boundary checks

Nikita Travkin (4):
clk: qcom: clk-rcg2: Fail Duty-Cycle configuration if MND divider is
not enabled.
clk: qcom: clk-rcg2: Make sure to not write d=0 to the NMD register
pinctrl: qcom: msm8916: Allow CAMSS GP clocks to be muxed
clk: qcom: gcc-msm8916: Add rates to the GP clocks

drivers/clk/qcom/clk-rcg2.c | 16 +++++++++---
drivers/clk/qcom/gcc-msm8916.c | 35 ++++++++++++++++++++++++++
drivers/pinctrl/qcom/pinctrl-msm8916.c | 4 +--
3 files changed, 49 insertions(+), 6 deletions(-)

--
2.35.3

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