Messages in this thread | | | Date | Fri, 10 Jun 2022 12:59:00 +0100 | From | Mark Brown <> | Subject | Re: [PATCH v1] regmap: add generic indirect regmap support |
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On Thu, Jun 09, 2022 at 05:30:43PM -0700, matthew.gerlach@linux.intel.com wrote: > On Thu, 9 Jun 2022, Mark Brown wrote: > > On Wed, Jun 08, 2022 at 11:54:26PM +0000, Zhang, Tianfei wrote:
> > > > ...that this appears to be entirely specific to some particular device, it's got > > > > things like hard coded register addresses and timeouts which mean it can't be > > > > reused.
> I think part of the confusion is that this patch should have been included > in a patch set that actually uses this regmap. This patch really should be > included with the following:
> https://lore.kernel.org/all/20220607032833.3482-1-tianfei.zhang@intel.com
> The hard coded register definitions are offsets to the passed in void > __iomem base address. This set of registers provides the semantics of > indirect register read/write to whatever the register set is connected to on > the back end. Conceptually this could be considered a specific type > indirect register access controller, but currently we have very different > backend implementations in RTL. Part of our intent is to have consistent > register interfaces for our FPGA IP so multiple drivers can reuse this > regmap.
...which is all specific to your particular implmentation of this and not a generic thing that will work for anyone else who implements the concept of indirected register access and happens to use a different control mechanism. If you have to use the same register interfaces to reuse this code then the code isn't generic. [unhandled content-type:application/pgp-signature] | |