Messages in this thread | | | From | Chen Yu <> | Date | Mon, 9 May 2022 23:31:21 +0800 | Subject | Re: [PATCH v3] sched/fair: filter out overloaded cpus in SIS |
| |
On Mon, May 9, 2022 at 11:21 PM Chen Yu <yu.chen.surf@gmail.com> wrote: > > On Sun, May 8, 2022 at 1:50 AM Abel Wu <wuyun.abel@bytedance.com> wrote: > > > > Hi Chen, > > > > On 5/8/22 12:09 AM, Chen Yu Wrote: > [cut] > > >> @@ -81,8 +81,20 @@ struct sched_domain_shared { > > >> atomic_t ref; > > >> atomic_t nr_busy_cpus; > > >> int has_idle_cores; > > >> + > > >> + /* > > >> + * Tracking of the overloaded cpus can be heavy, so start > > >> + * a new cacheline to avoid false sharing. > > >> + */ > > > Although we put the following items into different cache line compared to > > > above ones, is it possible that there is still cache false sharing if > > > CPU1 is reading nr_overloaded_cpus while > > > CPU2 is updating overloaded_cpus? > > > > I think it's not false sharing, it's just cache contention. But yes, > > it is still possible if the two items mixed with others (by compiler) > > in one cacheline, which seems out of our control.. > > > My understanding is that, since nr_overloaded_cpus starts with a new > cache line, overloaded_cpus is very likely to be in the same cache line. > Only If the write to nr_overloaded_cpus mask is not frequent(maybe tick based > update is not frequent), the read of nr_overloaded_cpus can survive from cache > false sharing, which is mainly read by SIS. I have a stupid thought > that if nr_overloaded_cpus > mask and nr_overloaded_cpus could be put to 2 cache lines. Not exactly, as overloaded_cpus and nr_overloaded_cpus are updated at the same time, it is not a false sharing case.
-- Thanks, Chenyu
| |