Messages in this thread | | | From | Janne Grunau <> | Subject | [PATCH v2 0/4] iommu: M1 Pro/Max DART support | Date | Tue, 3 May 2022 08:22:57 +0200 |
| |
Hej,
I've taken over this series to add support for DART on M1 Pro/Max from Sven.
Since v1 we have discovered further differences in the PTE format. It has four differences which makes it incompatible with the one in the M1:
- the physical addresses are shifted left by 4 bits and and have 2 more bits inside the PTE entries - the read/write protection flags are at a different position - the subpage protection feature is now mandatory. For Linux we can just configure it to always allow access to the entire page. - BIT(1) tags "uncached" mappings (used for the display controller)
The last difference is the most troublesome since it makes the PTE format incomaptible with iopte_type(). Handling this inside io-pgtable-arm.c seems manageable since DART supports just a single block size. It opens the question at which point we decide that DART uses its own io_pgtable_ops.
There is second type of DART (t8110) present on M1 Pro/Max SoCs which uses the same PTE format as t6000.
Janne
Sven Peter (4): dt-bindings: iommu: dart: add t6000 compatible iommu/io-pgtable: Add DART subpage protection support iommu/io-pgtable: Add DART PTE support for t6000 iommu: dart: Support t6000 variant
.../devicetree/bindings/iommu/apple,dart.yaml | 4 +- drivers/iommu/apple-dart.c | 24 +++++- drivers/iommu/io-pgtable-arm.c | 76 ++++++++++++++++++- drivers/iommu/io-pgtable.c | 1 + include/linux/io-pgtable.h | 3 + 5 files changed, 101 insertions(+), 7 deletions(-)
base-commit: 3123109284176b1532874591f7c81f3837bbdc17 -- 2.35.1
| |