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SubjectRe: [PATCH] Marvell MDIO clock related changes.
On Thu, May 26, 2022 at 03:57:20AM -0700, Piyush Malgujar wrote:
> On Fri, Apr 29, 2022 at 04:24:53PM +0200, Andrew Lunn wrote:
> > > > > 2) Marvell MDIO clock frequency attribute change:
> > > > > This MDIO change provides an option for user to have the bus speed set
> > > > > to their needs which is otherwise set to default(3.125 MHz).
> > > >
> > > > Please read 802.3 Clause 22. The default should be 2.5MHz.
> > > >
> > >
> > > These changes are only specific to Marvell Octeon family.
> >
> > Are you saying the Marvell Octeon family decide to ignore 802.3? Have
> > you tested every possible PHY that could be connected to this MDIO bus
> > and they all work for 3.125MHz, even though 802.3 says they only need
> > to support up to 2.5Mhz?
> >
> > Andrew
>
> Hi Andrew,
>
> Yes, but as for Marvell Octeon family it defaults to 3.125 MHz and this
> driver is already existing in the kernel.
> This patch is not changing that, only adding support to configure
> clock-freq from DTS.
> Also, following PHYs have been verified with it:
> PHY_MARVELL_88E1548,
> PHY_MARVELL_5123,
> PHY_MARVELL_5113,
> PHY_MARVELL_6141,
> PHY_MARVELL_88E1514,
> PHY_MARVELL_3310,
> PHY_VITESSE_8574

So if you want to ignore 802.3, please make it very clear in the DT
binding that the default is 3.125MHz, not 2.5Mhz which the standard
requires.

As you say, 3.125Mhz will work for some PHYs. And it will fail for
other PHYs.

Andrew

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