Messages in this thread | | | Subject | Re: [PATCH 0/3] clk: qcom: gdsc: add support for collapse-vote registers | From | Stephen Boyd <> | Date | Thu, 26 May 2022 11:33:10 -0700 |
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Quoting Johan Hovold (2022-05-23 02:32:50) > On Fri, May 20, 2022 at 08:51:09PM -0700, Stephen Boyd wrote: > > Please add Qualcomm on code for their hardware :) > > > > I did a translation from codeaurora but I don't know if Rajendra's will > > work. > > These addresses need to be added to .mailmap.
Patches welcome :)
> > > Quoting Johan Hovold (2022-05-20 03:09:45) > > > Recent Qualcomm platforms have APCS collapse-vote registers that allow > > > for sharing GDSCs with other masters (e.g. LPASS). > > > > How is it different from the voting logic that already exists in the > > gdsc file? Now every subsystem has to vote for off in addition to voting > > for on? > > No, the voting logic is unchanged (i.e. enabling by clearing a collapse > bit). > > The difference is just that a separate register register is used for the > voting. >
Ok. Got it.
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