Messages in this thread | | | From | Linus Walleij <> | Date | Tue, 24 May 2022 10:57:20 +0200 | Subject | Re: [PATCH v5 5/5] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt |
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On Mon, May 23, 2022 at 7:43 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add IRQ domain to RZ/G2L pinctrl driver to handle GPIO interrupt. > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can be > used as IRQ lines at a given time. Selection of pins as IRQ lines > is handled by IA55 (which is the IRQC block) which sits in between the > GPIO and GIC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
I don't know if I'm too tired or reading it wrong, but it seems you went through the trouble of making it possible to override .free() in the irqdomain in patch 3/5 and yet not using it in this patch 5/5?
Yours, Linus Walleij
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