Messages in this thread | | | Date | Tue, 24 May 2022 09:19:38 +0200 | From | Michael Walle <> | Subject | Re: [PATCH v3] mtd: spi-nor: macronix: Add support for mx66l2g45g |
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Am 2022-05-24 05:35, schrieb Jiaqing Zhao: > On 2022-05-24 01:04, Michael Walle wrote: >> Am 2022-05-23 17:03, schrieb Jiaqing Zhao: >>> Macronix mx66l2g45g is a 3V, 2Gbit (256MB) NOR flash that supports >>> x1, x2, and x4 operation modes. >>> >>> Tested read/write/erase with Aspeed AST2600 BMC SoC operating in x2 >>> mode at 50MHz, using Aspeed spi-mem driver. >>> >>> Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> >> >> Reviewed-by: Michael Walle <michael@walle.cc> >> >> # is this picked up by b4? link goes to the sfdp dump > > May I ask what do you mean by "is this picked up by b4?"
It was question to the maintainers (or myself). b4 the tool the spi-nor maintainers [1] use to pick up the patches. And, no it is not picked up automatically.
-michael
[1] https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation
>> Link: >> https://lore.kernel.org/r/2b859cff-2403-0526-f3ae-749920b3fd8b@linux.intel.com
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