Messages in this thread | | | Date | Mon, 23 May 2022 15:12:53 +0800 | Subject | Re: [PATCH v7 03/10] iommu/sva: Add iommu_sva_domain support | From | Baolu Lu <> |
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On 2022/5/19 15:20, Lu Baolu wrote: > The iommu_sva_domain represents a hardware pagetable that the IOMMU > hardware could use for SVA translation. This adds some infrastructure > to support SVA domain in the iommu common layer. It includes: > > - Add a new struct iommu_sva_domain and new IOMMU_DOMAIN_SVA domain > type. > - Add a new domain ops pointer in iommu_ops. The IOMMU drivers that > support SVA should provide the callbacks. > - Add helpers to allocate and free an SVA domain. > - Add helpers to set an SVA domain to a device and the reverse > operation. > > Some buses, like PCI, route packets without considering the PASID value. > Thus a DMA target address with PASID might be treated as P2P if the > address falls into the MMIO BAR of other devices in the group. To make > things simple, the attach/detach interfaces only apply to devices > belonging to the singleton groups, and the singleton is immutable in > fabric i.e. not affected by hotplug. > > The iommu_set/block_device_pasid() can be used for other purposes, > such as kernel DMA with pasid, mediation device, etc. Hence, it is put > in the iommu.c. > > Suggested-by: Jean-Philippe Brucker<jean-philippe@linaro.org> > Suggested-by: Jason Gunthorpe<jgg@nvidia.com> > Signed-off-by: Lu Baolu<baolu.lu@linux.intel.com> > --- > include/linux/iommu.h | 51 +++++++++++++++++++++++++ > drivers/iommu/iommu-sva-lib.h | 15 ++++++++ > drivers/iommu/iommu-sva-lib.c | 48 +++++++++++++++++++++++ > drivers/iommu/iommu.c | 71 +++++++++++++++++++++++++++++++++++ > 4 files changed, 185 insertions(+) > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 0c358b7c583b..e8cf82d46ce1 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -64,6 +64,9 @@ struct iommu_domain_geometry { > #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ > #define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ > > +#define __IOMMU_DOMAIN_SHARED (1U << 4) /* Page table shared from CPU */ > +#define __IOMMU_DOMAIN_HOST_VA (1U << 5) /* Host CPU virtual address */ > + > /* > * This are the possible domain-types > * > @@ -86,6 +89,8 @@ struct iommu_domain_geometry { > #define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ > __IOMMU_DOMAIN_DMA_API | \ > __IOMMU_DOMAIN_DMA_FQ) > +#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SHARED | \ > + __IOMMU_DOMAIN_HOST_VA) > > struct iommu_domain { > unsigned type; > @@ -254,6 +259,7 @@ struct iommu_ops { > int (*def_domain_type)(struct device *dev); > > const struct iommu_domain_ops *default_domain_ops; > + const struct iommu_domain_ops *sva_domain_ops;
Per Joerg's comment in anther thread,
https://lore.kernel.org/linux-iommu/YodVJ7ervpIdWfg+@8bytes.org/
adding a sva_domain_ops here is not the right way to go.
If no objection, I will make the sva domain go through the generic domain_alloc/free() callbacks in the next version.
Best regards, baolu
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